1. Field of the Invention
The present invention relates to a semiconductor memory device and a method of fabricating the same, and more particularly, it relates to a semiconductor memory device storing data by injecting charges into charge holding insulator films and a method of fabricating the same.
2. Description of the Background Art
A semiconductor memory device storing data by injecting charges into charge holding insulator films is known in general. This semiconductor memory device has memory cells each including a multilayer structure of a silicon oxide film, a silicon nitride film and another silicon oxide film formed on a portion of a silicon substrate located between isolation films, a gate electrode provided on the multilayer structure and a pair of impurity regions for forming source/drain regions on both sides of the multilayer structure, for example.
Each memory cell has two storage holding regions partially formed by the aforementioned multilayer structure in the vicinity of the pair of impurity regions, for writing data by injecting hot electrons into the storage holding regions. At this time, the semiconductor memory device can store data by injecting hot electrons into the two storage holding regions of each memory cell respectively, whereby data of two bits can be stored in each memory cell.
In the aforementioned memory cell, however, the two storage holding regions are connected with each other through the silicon nitride film and hence charges stored in the storage holding regions are canceled due to hole conduction through the silicon nitride film to disadvantageously reduce the data holding property.
For example, Japanese Patent Laying-Open No. 2002-237540 describes a semiconductor device capable of solving this problem. The semiconductor device described in this literature stores information by trapping carriers in central layers of three-layer insulator films formed on the side surfaces of gate electrodes of FETs (field-effect transistors), and hence the aforementioned reduction of the data holding property resulting from hole conduction can be inhibited.
In the semiconductor device described in Japanese Patent Laying-Open No. 2002-237540, however, the three-layer insulator films are formed from the side surfaces of the gate electrodes onto a substrate while side wall spacers are further formed thereon, and hence the transverse width of memory cells in a direction parallel to the main surface of the substrate is inevitably increased. Therefore, the memory cells are disadvantageously increased in size.